AT89S52 microcontroller basic knowledge Xiangjie

Performance Description:

The AT89S52 is a low-power, high-performance CMOS 8-bit microcontroller with 8K in-system programmable Flash memory. It is manufactured using Atmel's high density nonvolatile memory technology and is fully compatible with industry standard 80C51 product instructions and pins. On-chip Flash allows program memory to be system-programmable, which is suitable for conventional programmers. On a single chip, with a clever 8-bit CPU and in-system programmable Flash, the AT89S52 offers a highly flexible and highly effective solution for a wide range of embedded control applications. The AT89S52 microcontroller provides some of the standard features: 8K bytes of Flash, 256 bytes of RAM, 32 bits of I / O lines, watchdog timer, two data pointers, three 16-bit timer / counters, Interrupt structure, full duplex serial port, on-chip crystal oscillator and clock circuit. In addition, AT89S52 microcontroller design and operating frequency can be reduced to 0 HZ static logic, supports two kinds of software selectable power-saving mode. In Idle mode, the CPU stops working while the RAM, timer / counter, serial port, external interrupt system can continue to work. In power-down protection mode, the RAM contents can be saved, but the oscillator will be frozen and the microcontroller will stop working until the next interrupt or hardware reset. The pin configuration shown in the figure: (three packages: PDIP, PLCC, TQFP)

Pin Description:

Port 0: Port 0 is an 8-bit open-drain bi-directional I / O port. As output, each bit can drive 8 TTL logic levels. When writing "1" to port P0, the pin functions as a high-impedance input. Port 0 is also used as the lower 8 bits of address / data when accessing external programs and data memory. In this mode, P0 has an internal pull-up resistor. Port P0 is also used to receive instruction bytes during flash programming. Instruction bytes are output during program verification. Program verification, the need for external pull-up resistor.

Port 1: Port 1 is an 8-bit bidirectional I / O port with an internal pull-up resistor. The p1 output buffer drives 4 TTL logic levels. When writing "1" to port P1, the internal pull-up resistor pulls the port high to be used as the input port. When used as an input, the pin that is pulled low externally will output current (IIL) due to internal resistance. In addition, P1.0 and P1.2 provide the external count input (P1.0 / T2) of timer / counter 2 and the trigger input (P1.1 / T2EX) of timer / counter 2, respectively, as shown in the following table. Port 1 receives the lower 8-bit address byte during flash programming and verification.

Port 2: Port 2 is an 8-bit bidirectional I / O port with internal pull-ups. The P2 output buffer drives 4 TTL logic levels. When "1" is written to port P2, the internal pull-up resistor pulls the port high to be used as the input port. When used as an input, the pin that is pulled low externally will output current (IIL) due to internal resistance. When accessing external program memory or reading external data memory with a 16-bit address (eg, executing MOVX @DPTR), port 2 sends out a high eight-bit address. Port 2 uses a strong internal pull-up for this application. Port P2 outputs the contents of the P2 latch when accessing external data memory using an 8-bit address such as MOVX @ RI. In flash programming and verification, P2 port also receives the upper 8-bit address bytes and some control signals.

Port 3: Port 3 is an 8-bit bidirectional I / O port with an internal pull-up resistor. The p3 output buffer drives 4 TTL logic levels. When writing "1" to port P3, the internal pull-up resistor pulls the port high and can be used as an input port at this time. When used as an input, the pin that is pulled low externally will output current (IIL) due to internal resistance. Port 3 is also used as AT89S52 special function (second function). During flash programming and calibration, port 3 also receives some control signals.

In addition, Port 3 also receives some FLASH flash programming and program control of the control signal.

RST - reset input. When the oscillator is in operation, a RST pin high above two machine cycles will be a microcontroller reset.

ALE / PROG - The ALE (Address Latch Enable) output pulse is used to latch the lower 8 bytes of an address when accessing external program memory or data memory. In general, ALE still outputs a fixed pulse signal at 1/6 of the oscillation frequency of the clock, so it can output the clock externally or for timing purposes. Note that one ALE pulse is skipped every time an external data memory is accessed. This pin is also used to enter a programming pulse (PROG) during programming of FLASH memory. If necessary, ALE operation can be disabled by setting the D0 bit of the 8EH unit in the special function register (SFR) area. After this bit is set, only one MOVX and MOVC instruction can activate ALE. In addition, the pin will be slightly pulled up, the implementation of an external program microcontroller, you should set the ALE disable bit is invalid.

PSEN - Program Memory Enable (PSEN) The output is the read strobe for external program memory. When the AT89C52 is fetched (or data) from the external program memory, PSEN is valid twice per machine cycle, that is, two pulses are output at During this period, the PSEN signal will be skipped twice when accessing the external data memory.

EA / VPP - External Access Enable To enable the CPU to access only external program memory (address 0000H-FFFFH), the EA pin must be held low (ground). It should be noted that if the encryption bit LB1 is programmed, the state of EA end will be latched internally during reset. If EA terminal is high level (then Vcc terminal), CPU executes internal program memory instruction. When FLASH memory is programmed, this pin plus + 12V programming allows power supply Vpp, of course, this must be the device is using 12V programming voltage Vpp.

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Author：Brittany Antonia （The author of article owns the copyright.）