Xilinx ：The Integration of the Zynq UltraScale + RFSoC Series has been shipped

Tuesday, October 10, 2017

The chip has been shipped for multiple customers, and the early trial plan is now available

Xilinx, Inc. (NASDAQ: XLNX), a global leader in all Programmable technology and devices, today announced that its Zynq UltraScale + RFSoC family is shipping, which integrates RF signal chains through a groundbreaking architecture In a single-chip SoC, is committed to accelerating the implementation of 5G wireless, wired remote-PHY and other applications. All Programmable RFSoC, based on the 16nm UltraScale + MPSoC architecture, integrates RF data converters on a single chip to reduce system power and package size by up to 50% -70%, and its soft decision forward error correction (SD-FEC) To meet the 5G and DOCSIS 3.1 standard requirements. With the chip samples shipped to multiple customers, Zynq UltraScale + RFSoC series of early trial plan is now open.

Chip system for RF signal chains

Zynq RFSoC integrates RF data converters, SD-FEC cores and high-performance 16nm UltraScale + programmable logic and ARM® multiprocessing systems to create a comprehensive analog signal chain. RF-digital signal conditioning and processing are usually assigned to different independent subsystems, but Zynq UltraScale + RFSoC integrates analog, digital and embedded software designs into a single single-chip device for a high degree of system robustness. The devices have the following features:

8 4GSPS or 16 2GSPS12 bit ADCs
8-16 6.4GSPS 14-bit DAC
SD-FEC core, LDPC and Turbo codecs are fully integrated to meet the 5G and DOCSIS3.1 standard requirements
ARM processing subsystem, using quad-core Cortex-A53 and dual-core Cortex-R5
16nm UltraScale + programmable logic with integrated Nx100G core
Up to 930,000 logical units and more than 4,200 DSP slices

Applications supported by the ZynqRFSoC family include high-performance RF applications such as massive-MIMO remote radio units, millimeter-wave mobile backhaul, 5G baseband, fixed wireless access, wired remote-PHY nodes, test and measurement, and satellite communications.

5G wireless

Zynq UltraScale + RFSoC devices provide bandwidth-intensive systems for next-generation wireless infrastructures. If there is no system-level breakthrough, 5 times the bandwidth, 100 times the user data rate, 1000 times the network capacity, including 5G requirements can not be achieved. The Zynq UltraScale + RFSoC integrates discrete RF data converters and signal chain optimization techniques so that Massive-MIMO far-end RF units, wireless backhaul and fixed wireless access not only achieve high channel density, but also power and package size Reduced by 50% to 75%. In a 5G baseband application, multiple integrated SD-FEC kernels can increase system throughput by 10-20 times compared to soft core implementations and meet stringent power and cooling requirements.

Wired Remote-PHY

Likewise, in the next generation of cable broadband services, ZynqRFSoC also enables the perfect combination of package size, energy efficiency and hardware flexibility to support Remote-PHY systems. The distributed access architecture facilitates the transfer of the DOCSIS 3.x PHY function from a centralized head-end device to a remote-PHY node near the consumer. By replacing the inefficient analog optical transmission with ubiquitous Ethernet transmission, the capacity, scale and performance of the network have been greatly improved. RFSoC ensures a flexible R-PHY deployment to meet DOCSIS 3.1 higher spectral efficiency requirements through RF integration and support for LDPC FEC signal chains.

Availability

Zynq UltraScale + RFSoC device samples are now shipping. The early trial plan for the Vivado® Design Suite, which supports Zynq UltraScale + RFSoC devices, is now available. Customers interested in the Zynq UltraScale + RFSoC Early Trial Program can contact your location for the Xilinx representative.

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Author ：Brittany Antonia — WIN SOURCE ELECTRONICS