The EQCO125X40 is a single chip (equalizer, driver, reclocker) that repeats high-speed 8b/10b coded data signals with a downstream bit-rate between 1.25 to 12.5 Gbps. From a cable or PCB trace pair, the signal is received by an auto-adaptive equalizer that compensates for higher-frequency losses in the preceding channel. A reference-less Clock-Data Recovery (CDR) subsequently self-adapts to the incoming bit-rate and resets the jitter back to a low value for maintaining signal integrity. A cable driver launches this clean signal back onto a cable or PCB trace pair. When placed in series as a repeater, a signal can travel through several EQCO125X40 Family devices to the destination. The EQCO125X40 CDR restores signal integrity at each link along the way.