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XR88C681CJ

Part No XR88C681CJ
Manufacturer Exar Corporation
Catalog Electronic Wholesale
Description CMOS DUAL CHANNEL UART (DUART)
Sample
Rohs State Need to verify
ECAD Module
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Manufacturer Exar Corporation
Win Source Part Number 1282306-XR88C681CJ
Manufacturer Homepage www.exar.com
Popularity Medium
Supply and Demand Status Limited
Ultra Librarian 3D Model Ultra Librarian XR88C681CJ CAD Model

Description

The Exar Corporation XR88C681CJ is a dual universal asynchronous receiver/transmitter (DUART) with clock generation and control circuits. It is designed to interface asynchronous serial communication devices to a microprocessor system. The DUART provides two independent full-duplex channels, each capable of operating at a wide range of baud rates.

Applications

  • Serial Communication
  • Industrial Automation
  • Data Acquisition Systems
  • Point-of-Sale (POS) Terminals
  • Networking Equipment

Features

  • Dual Universal Asynchronous Receiver/Transmitter (DUART)
  • Two independent full-duplex channels
  • Programmable baud rate generator for each channel
  • 5, 6, 7, or 8 data bits and 1, 1.5, or 2 stop bits
  • Odd, even, or no parity generation and detection
  • Line break generation and detection
  • Automatic wake-up mode for multi-drop applications
  • On-chip crystal oscillator
  • Interrupt control logic

Benefits

  • Versatile Communication: Supports a wide range of asynchronous serial communication protocols.
  • Flexible Baud Rate: Offers programmable baud rates for various applications.
  • Reduced CPU Overhead: Hardware handles serial communication tasks, freeing up CPU resources.
  • Multi-Drop Support: Automatic wake-up mode facilitates multi-drop network configurations.
  • Reliable Operation: Built-in parity generation and detection ensure data integrity.

Additional Details

The XR88C681CJ incorporates programmable baud rate generators for each channel, allowing flexible configuration to meet specific communication requirements. The device supports various data bit lengths (5, 6, 7, or 8 bits) and stop bit configurations (1, 1.5, or 2 bits). Parity generation and detection options include odd, even, or no parity. The DUART includes line break generation and detection capabilities for error handling. An automatic wake-up mode is included for multi-drop applications, improving network efficiency. The on-chip crystal oscillator simplifies system design by eliminating the need for an external clock source. Interrupt control logic enables efficient interrupt handling.

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